FIG. 1 illustrates a wafer (or substrate) 102 having a plurality of devices built thereon. The devices 104 can be microelectromechanical systems (MEMS), microprocessors, memory chips, or other types of integrated circuits and/or mechanical features. For certain devices 104, such as MEMS, it is desirable to package the devices in a hermetic sealed enclosure to protect them from environmental contamination.
FIGS. 2A-2D illustrate one approach that has been tried for individually packaging the devices 104 in a sealed enclosure. When the devices 104 on the wafer 102 are completed, the individual devices 104 are cut from the wafer by sawing along the “streets” between devices 104, a process known as “singulation.” After singulation, each individual device 104 becomes a packaged device 200 by placing a packaging cap 202 over the device 104 and then thermally reflowing the cap to the substrate 102 to ensure the cap is sealed. Reflowing usually involves placing the device 200 as shown into an oven, microwave, or similar heating device so that a bead of sealant will melt or react to form a hermetic seal with the substrate. The bead of sealant is applied to the perimeter of the packaging cap or comes pre-applied to the perimeter before the cap 202 is put over the device 104.
This approach for packaging individual devices has various shortcomings. Most notably, surface tension in the sealant during reflow causes the packaging cap 202 to either rotate as shown in FIG. 2C, translate as shown in FIG. 2D, or both. If the packaging cap 202 rotates or translates too much, it will no longer cover the desired area of the device 104, and indeed may damage the device. On top of these disadvantages, individually packaging each device requires multiple operations and is therefore time consuming and costly.
Attempts have been made to overcome the disadvantages of individually packaging devices 104 by shifting to wafer-level, matrix-array, or large-area substrate packaging. In current wafer-level packaging techniques, packaging caps are simultaneously placed on all the devices 104 on a single wafer 102, and then the entire wafer is heated to reflow all the packaging caps onto the wafer at once. After all the packaging caps are attached to the wafer, the individual sealed devices are singulated from the wafer. While these wafer-level packaging techniques involve fewer operations, they suffer from some of the same disadvantages as individual packaging of devices. If no restraining force is provided for the packaging caps during reflow, they still rotate and translate as shown in FIGS. 2C and 2D. The rotation and translation of the caps can damage the devices 104, and when rotation and translation occur at the wafer or substrate level they can interfere with proper singulation of the devices 104. This can render the device or even the entire wafer useless. While several attempts have been made to overcome the problems of current wafer-level packaging techniques, these have either not solved the problem or have led to other subsequent problems. For example, another approach is to reflow the packaging caps while providing a force to press each cap into the substrate to prevent its movement. However, this method has led to wafer cracking because of the stress concentrations caused where the caps meet the substrate.